plan9port

fork of plan9port with libvec, libstr and libsdb
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mips (5460B)


      1 // Mips support
      2 
      3 defn acidinit()			// Called after all the init modules are loaded
      4 {
      5 	bplist = {};
      6 	bpfmt = 'X';
      7 
      8 	srcpath = {
      9 		"./",
     10 		"/sys/src/libc/port/",
     11 		"/sys/src/libc/9sys/",
     12 		"/sys/src/libc/mips/"
     13 	};
     14 
     15 	srcfiles = {};		// list of loaded files
     16 	srctext = {};		// the text of the files
     17 }
     18 
     19 defn stk()			// trace
     20 {
     21 	_stk(*PC, *SP, linkreg(0), 0);
     22 }
     23 
     24 defn lstk()			// trace with locals
     25 {
     26 	_stk(*PC, *SP, linkreg(0), 1);
     27 }
     28 
     29 defn gpr()			// print general purpose registers
     30 {
     31 	print("R1\t", *R1, " R2\t", *R2, " R3\t", *R3, "\n");
     32 	print("R4\t", *R4, " R5\t", *R5, " R6\t", *R6, "\n");
     33 	print("R7\t", *R7, " R8\t", *R8, " R9\t", *R9, "\n");
     34 	print("R10\t", *R10, " R11\t", *R11, " R12\t", *R12, "\n");
     35 	print("R13\t", *R13, " R14\t", *R14, " R15\t", *R15, "\n");
     36 	print("R16\t", *R16, " R17\t", *R17, " R18\t", *R18, "\n");
     37 	print("R19\t", *R19, " R20\t", *R20, " R21\t", *R21, "\n");
     38 	print("R22\t", *R22, " R23\t", *R23, " R24\t", *R24, "\n");
     39 	print("R25\t", *R25, " R26\t", *R26, " R27\t", *R27, "\n");
     40 	print("R28\t", *R28, " R29\t", *SP, " R30\t", *R30, "\n");
     41 	print("R31\t", *R31, "\n");
     42 }
     43 
     44 defn Fpr()
     45 {
     46 	print("F0\t",  *fmt(F0, 'G'),  "\tF2\t",  *fmt(F2, 'G'), "\n");
     47 	print("F4\t",  *fmt(F4, 'G'),  "\tF6\t",  *fmt(F6, 'G'), "\n");
     48 	print("F8\t",  *fmt(F8, 'G'),  "\tF10\t", *fmt(F10, 'G'), "\n");
     49 	print("F12\t", *fmt(F12, 'G'), "\tF14\t", *fmt(F14, 'G'), "\n");
     50 	print("F16\t", *fmt(F16, 'G'), "\tF18\t", *fmt(F18, 'G'), "\n");
     51 	print("F20\t", *fmt(F20, 'G'), "\tF22\t", *fmt(F22, 'G'), "\n");
     52 	print("F24\t", *fmt(F24, 'G'), "\tF26\t", *fmt(F26, 'G'), "\n");
     53 	print("F28\t", *fmt(F28, 'G'), "\tF30\t", *fmt(F30, 'G'), "\n");
     54 }
     55 
     56 defn fpr()
     57 {
     58 	print("F0\t",  *fmt(F0, 'g'),  "\tF1\t",  *fmt(F1, 'g'), "\n");
     59 	print("F2\t",  *fmt(F2, 'g'),  "\tF3\t",  *fmt(F3, 'g'), "\n");
     60 	print("F4\t",  *fmt(F4, 'g'),  "\tF5\t",  *fmt(F5, 'g'), "\n");
     61 	print("F6\t",  *fmt(F6, 'g'),  "\tF7\t",  *fmt(F7, 'g'), "\n");
     62 	print("F8\t",  *fmt(F8, 'g'),  "\tF9\t",  *fmt(F9, 'g'), "\n");
     63 	print("F10\t", *fmt(F10, 'g'), "\tF11\t", *fmt(F11, 'g'), "\n");
     64 	print("F12\t", *fmt(F12, 'g'), "\tF13\t", *fmt(F13, 'g'), "\n");
     65 	print("F14\t", *fmt(F14, 'g'), "\tF15\t", *fmt(F15, 'g'), "\n");
     66 	print("F16\t", *fmt(F16, 'g'), "\tF17\t", *fmt(F17, 'g'), "\n");
     67 	print("F18\t", *fmt(F18, 'g'), "\tF19\t", *fmt(F19, 'g'), "\n");
     68 	print("F20\t", *fmt(F20, 'g'), "\tF21\t", *fmt(F21, 'g'), "\n");
     69 	print("F22\t", *fmt(F22, 'g'), "\tF23\t", *fmt(F23, 'g'), "\n");
     70 	print("F24\t", *fmt(F24, 'g'), "\tF25\t", *fmt(F25, 'g'), "\n");
     71 	print("F26\t", *fmt(F26, 'g'), "\tF27\t", *fmt(F27, 'g'), "\n");
     72 	print("F28\t", *fmt(F28, 'g'), "\tF29\t", *fmt(F29, 'g'), "\n");
     73 	print("F30\t", *fmt(F30, 'g'), "\tF31\t", *fmt(F31, 'g'), "\n");
     74 }
     75 
     76 defn spr()				// print special processor registers
     77 {
     78 	local pc, link, cause;
     79 
     80 	pc = *PC;
     81 	print("PC\t", pc, " ", fmt(pc, 'a'), "  ");
     82 	pfl(pc);
     83 
     84 	link = *R31;
     85 	print("SP\t", *SP, "\tLINK\t", link, " ", fmt(link, 'a'), " ");
     86 	pfl(link);
     87 
     88 	cause = *CAUSE;
     89 	print("STATUS\t", *STATUS, "\tCAUSE\t", cause, " ", reason(cause), "\n");
     90 	print("TLBVIR\t", *TLBVIRT, "\tBADVADR\t", *BADVADDR, "\n");
     91 
     92 	print("HI\t", *HI, "\tLO\t", *LO, "\n");
     93 }
     94 
     95 defn regs()				// print all registers
     96 {
     97 	spr();
     98 	gpr();
     99 }
    100 
    101 defn pstop(pid)
    102 {
    103 	local l, pc;
    104 
    105 	pc = *PC;
    106 
    107 	print(pid,": ", reason(*CAUSE), "\t");
    108 	print(fmt(pc, 'a'), "\t", fmt(pc, 'i'), "\n");
    109 
    110 	if notes then {
    111 		if notes[0] != "sys: breakpoint" then {
    112 			print("Notes pending:\n");
    113 			l = notes;
    114 			while l do {
    115 				print("\t", head l, "\n");
    116 				l = tail l;
    117 			}
    118 		}
    119 	}
    120 }
    121 
    122 sizeofUreg = 152;
    123 aggr Ureg
    124 {
    125 	'X' 0 status;
    126 	'X' 4 pc;
    127 	{
    128 	'X' 8 sp;
    129 	'X' 8 usp;
    130 	};
    131 	'X' 12 cause;
    132 	'X' 16 badvaddr;
    133 	'X' 20 tlbvirt;
    134 	'X' 24 hi;
    135 	'X' 28 lo;
    136 	'X' 32 r31;
    137 	'X' 36 r30;
    138 	'X' 40 r28;
    139 	'X' 44 r27;
    140 	'X' 48 r26;
    141 	'X' 52 r25;
    142 	'X' 56 r24;
    143 	'X' 60 r23;
    144 	'X' 64 r22;
    145 	'X' 68 r21;
    146 	'X' 72 r20;
    147 	'X' 76 r19;
    148 	'X' 80 r18;
    149 	'X' 84 r17;
    150 	'X' 88 r16;
    151 	'X' 92 r15;
    152 	'X' 96 r14;
    153 	'X' 100 r13;
    154 	'X' 104 r12;
    155 	'X' 108 r11;
    156 	'X' 112 r10;
    157 	'X' 116 r9;
    158 	'X' 120 r8;
    159 	'X' 124 r7;
    160 	'X' 128 r6;
    161 	'X' 132 r5;
    162 	'X' 136 r4;
    163 	'X' 140 r3;
    164 	'X' 144 r2;
    165 	'X' 148 r1;
    166 };
    167 
    168 defn
    169 Ureg(addr) {
    170 	complex Ureg addr;
    171 	print("	status	", addr.status, "\n");
    172 	print("	pc	", addr.pc, "\n");
    173 	print("	sp	", addr.sp, "\n");
    174 	print("	cause	", addr.cause, "\n");
    175 	print("	badvaddr	", addr.badvaddr, "\n");
    176 	print("	tlbvirt	", addr.tlbvirt, "\n");
    177 	print("	hi	", addr.hi, "\n");
    178 	print("	lo	", addr.lo, "\n");
    179 	print("	r31	", addr.r31, "\n");
    180 	print("	r30	", addr.r30, "\n");
    181 	print("	r28	", addr.r28, "\n");
    182 	print("	r27	", addr.r27, "\n");
    183 	print("	r26	", addr.r26, "\n");
    184 	print("	r25	", addr.r25, "\n");
    185 	print("	r24	", addr.r24, "\n");
    186 	print("	r23	", addr.r23, "\n");
    187 	print("	r22	", addr.r22, "\n");
    188 	print("	r21	", addr.r21, "\n");
    189 	print("	r20	", addr.r20, "\n");
    190 	print("	r19	", addr.r19, "\n");
    191 	print("	r18	", addr.r18, "\n");
    192 	print("	r17	", addr.r17, "\n");
    193 	print("	r16	", addr.r16, "\n");
    194 	print("	r15	", addr.r15, "\n");
    195 	print("	r14	", addr.r14, "\n");
    196 	print("	r13	", addr.r13, "\n");
    197 	print("	r12	", addr.r12, "\n");
    198 	print("	r11	", addr.r11, "\n");
    199 	print("	r10	", addr.r10, "\n");
    200 	print("	r9	", addr.r9, "\n");
    201 	print("	r8	", addr.r8, "\n");
    202 	print("	r7	", addr.r7, "\n");
    203 	print("	r6	", addr.r6, "\n");
    204 	print("	r5	", addr.r5, "\n");
    205 	print("	r4	", addr.r4, "\n");
    206 	print("	r3	", addr.r3, "\n");
    207 	print("	r2	", addr.r2, "\n");
    208 	print("	r1	", addr.r1, "\n");
    209 };
    210 
    211 defn linkreg(addr)
    212 {
    213 	complex Ureg addr;
    214 	return addr.r31\X;
    215 }
    216 
    217 print(acidfile);